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UNITED TEST & ASSEMBLY CT LT

Overview
  • Total Patents
    62
  • GoodIP Patent Rank
    146,086
About

UNITED TEST & ASSEMBLY CT LT has a total of 62 patent applications. Its first patent ever was published in 2006. It filed its patents most often in Taiwan, Singapore and United States. Its main competitors in its focus markets semiconductors, audio-visual technology and thermal processes are YAMAHA MOTOR ROBOTICS HOLDINGS CO LTD, ZYCUBE KK and SHENZHEN XIUYUAN ELECTRONIC TECH CO LTD.

Patent filings in countries

World map showing UNITED TEST & ASSEMBLY CT LTs patent filings in countries
# Country Total Patents
#1 Taiwan 21
#2 Singapore 20
#3 United States 15
#4 China 5
#5 Republic of Korea 1

Patent filings per year

Chart showing UNITED TEST & ASSEMBLY CT LTs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Kolan Ravi Kanth 13
#2 Toh Chin Hock 12
#3 Tan Hien Boon 9
#4 Sun Yi Sheng Anthony 9
#5 Eng Kian Teng 7
#6 Sun Anthony Yi Sheng 6
#7 Retuta Danny 6
#8 Ng Catherine Bee Liang 6
#9 Wang Chuen Khiang 6
#10 Manalac Rodel 5

Latest patents

Publication Filing date Title
US2015061101A1 Semiconductor packages and methods of packaging semiconductor devices
US2014227832A1 Semiconductor packages and methods of packaging semiconductor devices
US2014225242A1 Semiconductor packages and methods of packaging semiconductor devices
US2014264792A1 Semiconductor packages and methods of packaging semiconductor devices
US2014264835A1 Semiconductor packages and methods of packaging semiconductor devices
US2014264789A1 Semiconductor packages and methods of packaging semiconductor devices
CN103107099A Semiconductor packages and methods of packaging semiconductor devices
SG181248A1 Semiconductor packages and methods of packaging semiconductor devices
SG156589A1 Oven control system and methods
US2009200662A1 Semiconductor package and method of making the same
TW200950011A Semiconductor package and method of attaching semiconductor dies to substrates
TW200939328A Avoiding electrical shorts in packaging
US2008290505A1 Mold design and semiconductor package
SG148132A1 Method of assembling a stacked die semiconductor package
US2009004777A1 Stacked die semiconductor package and method of assembly
US2008284015A1 Semiconductor package with under bump metallization aligned with open vias
US2007164425A1 Thermally enhanced semiconductor package and method of producing the same