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CHIPPAC INC

Overview
  • Total Patents
    163
About

CHIPPAC INC has a total of 163 patent applications. Its first patent ever was published in 2001. It filed its patents most often in United States, Taiwan and WIPO (World Intellectual Property Organization). Its main competitors in its focus markets semiconductors, audio-visual technology and machines are STATS CHIPPAC LTD, SHENZHEN XIUYUAN ELECTRONIC TECH CO LTD and YAMAHA MOTOR ROBOTICS HOLDINGS CO LTD.

Patent filings per year

Chart showing CHIPPAC INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Karnezos Marcos 73
#2 Pendse Rajendra 29
#3 Pendse Rajendra D 26
#4 Carson Flynn 23
#5 Ahmad Nazir 17
#6 Kim Kyung-Moon 16
#7 Tam Samuel 15
#8 Kweon Young-Do 14
#9 Park Seung Wook 9
#10 Kwon Hyeog C 6

Latest patents

Publication Filing date Title
US2008299705A1 Chip scale package having flip chip interconnect on die paddle
US2006192295A1 Semiconductor flip chip package having substantially non-collapsible spacer
WO2006053277A2 Wire bond interconnection
US2006193744A1 Lead-free solder system
US2006192275A1 Encapsulation method for semiconductor device having center pad
US2006192274A1 Semiconductor package having double layer leadframe
WO2006047117A2 Method for reducing semiconductor die warpage
TW200616174A Stacked semiconductor package having adhesive/spacer structure and insulation
TW201334151A Adhesive/spacer island structure for multiple die package
US2005269692A1 Stacked semiconductor package having adhesive/spacer structure and insulation
WO2005117092A2 Stacked semiconductor package having adhesive/spacer structure and insulation
WO2005117111A2 Adhesive/spacer island structure for multiple die package
US2005218479A1 Spacer die structure and method for attaching
US2005156325A1 Die attach by temperature gradient lead free soft solder metal sheet or film
US2006012018A1 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
US2005110164A1 Bump-on-lead flip chip interconnection
WO2005048307A2 Flip chip interconnection pad layout
US2005208701A1 Semiconductor chip packaging method with individually placed film adhesive pieces
US2005221582A1 Bonding tool for mounting semiconductor chips
US2005218188A1 Wire bond capillary tip