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DAUBENSPECK TIMOTHY H

Overview
  • Total Patents
    38
About

DAUBENSPECK TIMOTHY H has a total of 38 patent applications. Its first patent ever was published in 2006. It filed its patents most often in United States. Its main competitors in its focus markets semiconductors, environmental technology and audio-visual technology are STATS CHIPPAC LTD, J-DEVICES CORP and CHIPPAC INC.

Patent filings in countries

World map showing DAUBENSPECK TIMOTHY Hs patent filings in countries
# Country Total Patents
#1 United States 38

Patent filings per year

Chart showing DAUBENSPECK TIMOTHY Hs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Daubenspeck Timothy H 38
#2 Sauter Wolfgang 34
#3 Gambino Jeffrey P 32
#4 Muzzy Christopher D 29
#5 Sullivan Timothy D 21
#6 Questad David L 4
#7 Misra Ekta 3
#8 Scott George J 3
#9 Wright Steven L 3
#10 Paquet Marie-Claude 3

Latest patents

Publication Filing date Title
US2014077383A1 Structure and method of making an offset-trench crackstop that forms an air gap adjacent to a passivated metal crackstop
US2014070401A1 Extrusion-resistant solder interconnect structures and methods of forming
US2014061933A1 Wire bond splash containment
US2014021600A1 Redistribution layer (RDL) with variable offset bumps
US2013320521A1 Releasable buried layer for 3-D fabrication and methods of manufacturing
US2013269974A1 Semiconductor structures and methods of manufacture
US2013234316A1 Self-aligned polymer passivation/aluminum pad
US2013234315A1 Structures and methods for detecting solder wetting of pedestal sidewalls
US2013119534A1 Metal pad structure for thickness enhancement of polymer used in electrical interconnection of semiconductor die to semiconductor chip package substrate with solder bump
US2012280399A1 Buffer pad in solder bump connections and methods of manufacture
US2012146212A1 Solder bump connections
US2012139123A1 Offset solder vias, methods of manufacturing and design structures
US2012119362A1 Ni plating of a BLM edge for Pb-free C4 undercut control
US8138099B1 Chip package solder interconnect formed by surface tension
US2012061832A1 Collar structure around solder balls that connect semiconductor die to semiconductor chip package substrate
US2012025383A1 Integrated circuit structure incorporating a conductor layer with both top surface and sidewall passivation and a method of forming the integrated circuit structure
US2011298095A1 Passivation layer extension to chip edge
US2011140271A1 Integrated circuit chip with pyramid or cone-shaped conductive pads for flexible C4 connections and a method of forming the integrated circuit chip
US2011006422A1 Structures and methods to improve lead-free C4 interconnect reliability
US2010263913A1 Metal wiring structures for uniform current density in C4 balls