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POWERTECH TECHNOLOGY INC

Overview
  • Total Patents
    1,280
  • GoodIP Patent Rank
    2,842
  • Filing trend
    ⇩ 30.0%
About

POWERTECH TECHNOLOGY INC has a total of 1,280 patent applications. It decreased the IP activity by 30.0%. Its first patent ever was published in 2000. It filed its patents most often in Taiwan, United States and China. Its main competitors in its focus markets semiconductors, audio-visual technology and measurement are NANTONG FUJITSU MICROELECT CO, STATS CHIPPAC LTD and CHIPPAC INC.

Patent filings in countries

World map showing POWERTECH TECHNOLOGY INCs patent filings in countries
# Country Total Patents
#1 Taiwan 765
#2 United States 242
#3 China 182
#4 Japan 71
#5 Republic of Korea 18
#6 Malaysia 1
#7 Singapore 1

Patent filings per year

Chart showing POWERTECH TECHNOLOGY INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Hsu Hung-Hsin 247
#2 Fan Wen-Jeng 134
#3 Lin Nan-Chun 124
#4 Chang Chien Shang-Yu 78
#5 Fang Li-Chih 66
#6 Hsu Hung Hsin 59
#7 Fan Wen Jeng 49
#8 Wenzheng Fan 41
#9 Lan Yuan-Fu 37
#10 Wang Chi-An 33

Latest patents

Publication Filing date Title
TWI717255B Package structure and manufacturing method thereof
TWI713167B Flip-chip semiconductor package and packaging method thereof
TWI707441B Redistribution layer of fan-out package and manufacturing method thereof
TWI717189B Detection device and detection method of multi-step ejector
TWI712104B Chip fixing device
TWI711131B Chip package structure
US2021050294A1 Fan-out chip package assembly and fan-out bottom package with fine pitch silicon through via
US2020091126A1 Semiconductor package and manufacturing method thereof
US2021074645A1 Chip package structure using silicon interposer as interconnection bridge
CN111816645A Antenna integrated packaging structure and manufacturing method thereof
TWI716124B Semiconductor package structure and manufacturing method thereof
US2021098324A1 Optoelectronic chip scale package with patterned dam structure
US2021091043A1 Semiconductor package and manufacturing method thereof
TWI716106B Resistance measuring method of package substrate and package substrate thereof
US2021050296A1 Semiconductor package structure and manufacturing method thereof
TWI710090B Semiconductor package structure and manufacturing method thereof
TWI692065B System package with high component density
TWI710093B Semiconductor package with a topping antenna
TW202040784A Stackable chip package
TWI691013B Chip picking and placing method and equipment