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CHIPMOS TECHNOLOGIES BERMUDA

Overview
  • Total Patents
    148
About

CHIPMOS TECHNOLOGIES BERMUDA has a total of 148 patent applications. Its first patent ever was published in 2002. It filed its patents most often in China, United States and Taiwan. Its main competitors in its focus markets semiconductors, measurement and machines are ST ASSEMBLY TEST SERVICES LTD, POWERTECH TECHNOLOGY INC and CHIPMOS TECHNOLOGIES INC.

Patent filings in countries

World map showing CHIPMOS TECHNOLOGIES BERMUDAs patent filings in countries
# Country Total Patents
#1 China 77
#2 United States 40
#3 Taiwan 30
#4 Germany 1

Patent filings per year

Chart showing CHIPMOS TECHNOLOGIES BERMUDAs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Wang Yeong-Her 18
#2 Liu An-Hong 12
#3 Tseng Noty 12
#4 Liu John 12
#5 Gengxin Shen 12
#6 Mingxun Li 10
#7 Chiou Jie-Hung 10
#8 Wu Yan-Yi 10
#9 Hongcun Lin 10
#10 Qiao Yong-Chao 9

Latest patents

Publication Filing date Title
CN101853845A Multichip stacking encapsulation
CN101826505A Packaging substrate and chip packaging structure
CN101740424A Manufacturing process for a chip package structure
CN101740411A Manufacturing process for a chip package structure
CN101740412A Manufacturing process for a quad flat non-leaded chip package structure
CN101752322A Chip packaging structure and manufacturing method thereof
US2009087953A1 Manufacturing process of leadframe-based BGA packages
US2010200972A1 BGA package with leads on chip
CN101452903A Pin rack for pin less encapsulation and encapsulation structure thereof
CN101425498A Chip bearing belt and chip packaging construction
CN101425497A On-chip lead wire encapsulation construction and lead wire frame thereof
CN101369567A Packaging structure for forming array with wire frame
CN101345222A Promote the rewinding type semiconductor packaging construction of heat sinking benefit
CN101325191A Square flat non-pin encapsulation method with pattern on chip
CN101325190A Square flat non-pin encapsulation structure with pattern on the conductor frame
CN101315923A Chip stack package structure
CN101315921A Chip stack packaging structure and method of producing the same
US2008224284A1 Chip package structure
US2008224277A1 Chip package and method of fabricating the same
CN101290921A Package base with wafer covered with thin membrane preventing deformation of thin membrane