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CHIPMOS TECHNOLOGIES INC

Overview
  • Total Patents
    1,110
  • GoodIP Patent Rank
    5,693
  • Filing trend
    ⇧ 7.0%
About

CHIPMOS TECHNOLOGIES INC has a total of 1,110 patent applications. It increased the IP activity by 7.0%. Its first patent ever was published in 1998. It filed its patents most often in Taiwan, China and United States. Its main competitors in its focus markets semiconductors, audio-visual technology and measurement are POWERTECH TECHNOLOGY INC, STATS CHIPPAC LTD and OTREMBA RALF.

Patent filings in countries

World map showing CHIPMOS TECHNOLOGIES INCs patent filings in countries

Patent filings per year

Chart showing CHIPMOS TECHNOLOGIES INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Shen Geng-Shin 76
#2 Liu John 70
#3 Chou Shih-Wen 64
#4 Chao Yeong-Ching 52
#5 Liu An-Hong 50
#6 Wang Yeong-Her 41
#7 Pan Yu-Tang 40
#8 Lee Yi-Chang 37
#9 Shen Geng Shin 37
#10 Huang Hsiang-Ming 31

Latest patents

Publication Filing date Title
TWI713178B Chip-on-film package structure
TWI713168B Chip package structure and manufacturing method thereof
TWI713165B Chip package structure and manufacturing method thereof
TWI706528B Electronic package device
TW202042359A Chip on film package structure
TWI703686B Chip on film package structure
TWI688017B Chip package structure and manufacturing method thereof
TWI697079B Chip on film package structure
TWI688057B Semiconductor package structure
TWI678743B Semiconductor circuit structure and manufacturing method thereof
TW202022999A Semiconductor package structure
TWI692042B Semiconductor package structure and manufacturing method thereof
TW202016878A Method for detecting edge defects
TW202015208A Substrate structure and semiconductor package
TW202002211A Flexible circuit substrate and chip on film package structure
TWI659585B Laser diode package strcture
TWI659507B Semiconductor package structure and manufacturing method thereof
TWI662672B Chip on film package structure
TWI673845B Chip-on-film package structure
TWI667746B Semiconductor package structure and method for manufacturing the same