Learn more

LOGICVISION INC

Overview
  • Total Patents
    129
About

LOGICVISION INC has a total of 129 patent applications. Its first patent ever was published in 1996. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and Australia. Its main competitors in its focus markets measurement, computer technology and basic communication technologies are RAJSKI JANUSZ, ON CHIP TECHNOLOGIES INC and IT & T.

Patent filings in countries

World map showing LOGICVISION INCs patent filings in countries

Patent filings per year

Chart showing LOGICVISION INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Nadeau-Dostie Benoit 81
#2 Cote Jean-Francois 55
#3 Sunter Stephen K 33
#4 Burek Dwayne 16
#5 Maamari Fadi 13
#6 Gauthier Pierre 11
#7 Shum Sonny Ngai San 10
#8 Price Paul 9
#9 Roy Aubin P J 9
#10 Romain Luc 7

Latest patents

Publication Filing date Title
US2007266278A1 Method for at-speed testing of memory interface using scan
US2005273683A1 Insertion of embedded test in RTL to GDSII flow
US2005240848A1 Masking circuit and method of masking corrupted bits
US2005240790A1 Clocking methodology for at-speed testing of scan circuits with synchronous clocks
US2005240847A1 Clock controller for at-speed testing of scan circuits
US7453255B2 Circuit and method for measuring delay of high speed signals
US7158899B2 Circuit and method for measuring jitter of high speed signals
US7257733B2 Memory repair circuit and method
US7188274B2 Memory repair analysis method and circuit
US7194669B2 Method and circuit for at-speed testing of scan circuits
US6895535B2 Circuit and method for testing high speed data circuits
US7219282B2 Boundary scan with strobed pad driver enable
US7139946B2 Method and test circuit for testing memory internal write enable
US6885213B2 Circuit and method for accurately applying a voltage to a node of an integrated circuit
AU2003235491A1 Method of and program product for performing gate-level diagnosis of failing vectors
US7159159B2 Circuit and method for adding parametric test capability to digital boundary scan
AU2003208993A1 Method and system for licensing intellectual property circuits
WO03065147A2 Method and program product for creating and maintaining self-contained design environment
WO03067478A1 Verification of embedded test structures in circuit designs
US7103860B2 Verification of embedded test structures in circuit designs