|
US2013047047A1
|
|
IC TAP with dual port router and additional capture input
|
|
US2012324305A1
|
|
Testing interposer method and apparatus
|
|
US2012278674A1
|
|
Interposer having functional leads, TAP, trigger unit, and monitor circuitry
|
|
US2012204073A1
|
|
Interposer TAP boundary register coupling stacked die functional input/output data
|
|
US2012102375A1
|
|
AT speed TAP with dual port router and command circuit
|
|
US2011225456A1
|
|
JTAG IC with commandable circuit controlling data register control router
|
|
US2011154088A1
|
|
Falling clock edge JTAG bus routers
|
|
US2011066907A1
|
|
Inverted TCK access port selector selecting one of plural TAPs
|
|
US2010318866A1
|
|
Tap control of TCA scan clock and scan enable
|
|
US2010318863A1
|
|
Serial compressed data I/O in a parallel test compression architecture
|
|
US2010115354A1
|
|
Formatter selectively outputting scan stimulus data from scan response data
|
|
US2006123306A1
|
|
Two pin serial bus communication interface
|
