HEFEI RELIANCE MEMORY LTD has a total of 61 patent applications. It decreased the IP activity by 60.0%. Its first patent ever was published in 2012. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and EPO (European Patent Office). Its main competitors in its focus markets computer technology, semiconductors and audio-visual technology are SAIFUN SEMICONDUCTORS LTD, ROHM CORP and QIMONDA FLASH GMBH.
# | Country | Total Patents | |
---|---|---|---|
#1 | United States | 47 | |
#2 | WIPO (World Intellectual Property Organization) | 7 | |
#3 | EPO (European Patent Office) | 3 | |
#4 | China | 2 | |
#5 | Taiwan | 2 |
# | Industry | |
---|---|---|
#1 | Computer technology | |
#2 | Semiconductors | |
#3 | Audio-visual technology |
# | Technology | |
---|---|---|
#1 | Static stores | |
#2 | Semiconductor devices | |
#3 | Electric digital data processing | |
#4 | Display controls | |
#5 | Specific computer systems |
# | Name | Total Patents |
---|---|---|
#1 | Lu Zhichao | 23 |
#2 | Haukness Brent Steven | 16 |
#3 | Haukness Brent | 10 |
#4 | Bronner Gary Bela | 10 |
#5 | Sekar Deepak Chandra | 10 |
#6 | Zhao Liang | 9 |
#7 | Ellis Wayne Frederick | 7 |
#8 | Kinney Wayne | 6 |
#9 | Rinerson Darrell | 6 |
#10 | Chevallier Christophe J | 6 |
Publication | Filing date | Title |
---|---|---|
US2021125924A1 | Gradual breakdown memory cell having multiple different dielectrics | |
WO2021050191A1 | Display driver integrated circuit having embedded resistive random access memory and display device having same | |
US2020372949A1 | Mixed digital-analog memory devices and circuits for secure storage and computing | |
US2020327865A1 | Display driver system with embedded non-volatile memory | |
US2020274062A1 | Thermal field controlled electrical conductivity change device | |
US2020176046A1 | Dual-precision analog memory cell and array | |
US2021082504A1 | Voltage-mode bit line precharge for random-access memory cells | |
US2020395539A1 | Non-volatile memory cell, non-volatile memory cell array, and method of manufacturing the same | |
US2019288037A1 | RRAM process integration scheme and cell structure with reduced masking operations | |
US2019288195A1 | Non-volatile memory structure with positioned doping | |
US2019392898A1 | Adaptive memory cell write conditions |