POLISHCHUK IGOR has a total of 12 patent applications. Its first patent ever was published in 2008. It filed its patents most often in United States. Its main competitors in its focus markets semiconductors, computer technology and micro-structure and nano-technology are DEAS ALEXANDER R, REBER DOUGLAS M and SHANGHAI ZHUOHONG MICROSYSTEM TECH CO LTD.
# | Country | Total Patents | |
---|---|---|---|
#1 | United States | 12 |
# | Industry | |
---|---|---|
#1 | Semiconductors | |
#2 | Computer technology | |
#3 | Micro-structure and nano-technology | |
#4 | Audio-visual technology | |
#5 | Measurement |
# | Technology | |
---|---|---|
#1 | Semiconductor devices | |
#2 | Electric digital data processing | |
#3 | Static stores | |
#4 | Nanostructure applications | |
#5 | Display controls | |
#6 | Measuring electric variables |
# | Name | Total Patents |
---|---|---|
#1 | Polishchuk Igor | 12 |
#2 | Levy Sagy | 8 |
#3 | Ramkumar Krishnaswamy | 6 |
#4 | Grivna Edward | 2 |
#5 | Byun Jeong | 1 |
#6 | Byun Jeong Soo | 1 |
#7 | Mandziy Vasyl | 1 |
Publication | Filing date | Title |
---|---|---|
US2015160756A1 | Hybrid capacitive touch system design and method | |
US2013307053A1 | Memory transistor with multiple charge storing layers and a high work function gate electrode | |
US8592891B1 | Methods for fabricating semiconductor memory with process induced strain | |
US2013175604A1 | Nonvolatile charge trap memory device having a high dielectric constant blocking region | |
US8691648B1 | Methods for fabricating semiconductor memory with process induced strain | |
US2012044197A1 | Capacitive sensor arrangement | |
US2012044187A1 | Capacitive touch screen | |
US8063434B1 | Memory transistor with multiple charge storing layers and a high work function gate electrode | |
US2009152621A1 | Nonvolatile charge trap memory device having a high dielectric constant blocking region |