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HEBERT FRANCOIS

Overview
  • Total Patents
    43
  • GoodIP Patent Rank
    237,315
  • Filing trend
    ⇩ 100.0%
About

HEBERT FRANCOIS has a total of 43 patent applications. It decreased the IP activity by 100.0%. Its first patent ever was published in 1972. It filed its patents most often in United States, France and WIPO (World Intellectual Property Organization). Its main competitors in its focus markets semiconductors, electrical machinery and energy and machines are SIRINORAKUL SARAVUTH, ONODERA MASANORI and XUE YAN XUN.

Patent filings in countries

World map showing HEBERT FRANCOISs patent filings in countries

Patent filings per year

Chart showing HEBERT FRANCOISs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Hebert Francois 41
#2 Bhalla Anup 6
#3 Liu Kai 4
#4 Sun Ming 3
#5 Kelkar Nikhil 3
#6 Feng Tao 2
#7 Petricek Shea 2
#8 Lu Jun 1
#9 Hébert François 1
#10 Althar Michael 1

Latest patents

Publication Filing date Title
US2018102435A1 Self-aligned slotted accumulation-mode field effect transistor (ACCUFET) structure and method
US2012312962A1 Optical sensors for detecting relative motion and/or position and methods and systems for using such optical sensors
US2012313201A1 Optical sensor devices including front-end-of-line (feol) optical filters and methods for fabricating optical sensor devices
US2013043940A1 Back-to-back stacked dies
US2012256193A1 Monolithic integrated capacitors for high-efficiency power converters
US2012098090A1 High-efficiency power converters with integrated capacitors
US2011260216A1 Power devices with integrated protection devices: structures and methods
US2011180806A1 Monolithic integration of gallium nitride and silicon devices and circuits, structure and method
US2012007097A1 Schottky diode with combined field plate and guard ring
US2010330754A1 Methods for manufacturing enhancement-mode HEMTs with self-aligned field plate
US2011115047A1 Semiconductor process using mask openings of varying widths to form two or more device structures
US2011121387A1 Integrated guarded schottky diode compatible with trench-gate dmos, structure and method
US2010276752A1 Monolithic output stage with vertical high-side PMOS and vertical low-side NMOS interconnected using buried metal, structure and method
US2010276701A1 Low thermal resistance and robust chip-scale-package (csp), structure and method
US2010155836A1 Co-packaging approach for power converters based on planar devices, structure and method
US2010133674A1 Compact semiconductor package with integrated bypass capacitor and method
US2008265326A1 Structure and method for self protection of power device with expanded voltage ranges
US2009108456A1 Solder-top enhanced semiconductor device for low parasitic impedance packaging
US2008238599A1 Chip scale power converter package having an inductor substrate
US2008006951A1 Copper bonding compatible bond pad structure and method