D3 Semiconductor LLC has a total of 45 patent applications. It increased the IP activity by 0.0%. Its first patent ever was published in 2013. It filed its patents most often in United States, China and WIPO (World Intellectual Property Organization). Its main competitors in its focus markets semiconductors and computer technology are ONODERA MASANORI, SHEN GENG-SHIN and DECA TECHNOLOGIES INC.
# | Country | Total Patents | |
---|---|---|---|
#1 | United States | 16 | |
#2 | China | 7 | |
#3 | WIPO (World Intellectual Property Organization) | 7 | |
#4 | EPO (European Patent Office) | 6 | |
#5 | Republic of Korea | 6 | |
#6 | Taiwan | 3 |
# | Industry | |
---|---|---|
#1 | Semiconductors | |
#2 | Computer technology |
# | Technology | |
---|---|---|
#1 | Semiconductor devices | |
#2 | Electric digital data processing |
# | Name | Total Patents |
---|---|---|
#1 | Harrington Iii Thomas E | 23 |
#2 | Qu Zhijun | 17 |
#3 | Harrington Thomas E | 16 |
#4 | Spohnheimer John V | 7 |
#5 | Harrington Thomas E Iii | 6 |
#6 | Yang Robert Kuo-Chang | 6 |
#7 | Zhijun Qu | 1 |
#8 | Yang Robert Kuo Chang | 1 |
Publication | Filing date | Title |
---|---|---|
US2018261691A1 | Super junction MOS bipolar transistor having drain gaps | |
US2016254373A1 | Surface devices within a vertical power device | |
WO2017058279A1 | Source-gate region architecture in a vertical power semiconductor device | |
US2017098705A1 | Termination region architecture for vertical power transistors | |
KR20150131195A | Device architecture and method for temperature compensation of vertical field effect devices | |
KR20150092212A | Device architecture and method for precision enhancement of vertical semiconductor devices | |
CN105103294A | Device architecture and method for improved packing of vertical field effect devices |