Semiconductor device and method of controlling warpage in semiconductor package
US2013221543A1
Integrated circuit packaging system with interconnects
US2013154116A1
Integrated circuit packaging system with perimeter antiwarpage structure and method of manufacture thereof
US2013154085A1
Integrated circuit packaging system with heat conduction and method of manufacture thereof
US2013154078A1
Integrated circuit packaging system with heat slug and method of manufacture thereof
US2013105963A1
Semiconductor device and method of forming thermal interface material and heat spreader over semiconductor die
US2013075916A1
Integrated circuit packaging system with external wire connection and method of manufacture thereof
US2013049188A1
Semiconductor Device and Method of Forming TIM Within Recesses of MUF Material
US2013037936A1
Semiconductor device and method of forming a stackable semiconductor package with vertically-oriented discrete electrical devices as interconnect structures
US2012326291A1
Integrated circuit packaging system with underfill and method of manufacture thereof
US2012306104A1
Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection properties
US2012286407A1
Semiconductor device and method of forming leadframe with conductive bodies for vertical electrical interconnect of semiconductor die
US2012280374A1
Semiconductor device and method of mounting cover to semiconductor die and interposer with adhesive material
US2012273937A1
Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
US2012273938A1
Semiconductor device and method of forming an interconnect structure with conductive material recessed within conductive ring over surface of conductive pillar
US2012241979A1
Integrated circuit packaging system with step mold and method of manufacture thereof
US2012211900A1
Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer
US2012146235A1
Integrated circuit packaging system with vertical interconnection and method of manufacture thereof
US2012104624A1
Semiconductor device and method of stacking semiconductor die in mold laser package interconnected by bumps and conductive vias
US2012068319A1
Integrated circuit packaging system with stack interconnect and method of manufacture thereof