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BEDESCHI FERDINANDO

Overview
  • Total Patents
    29
About

BEDESCHI FERDINANDO has a total of 29 patent applications. Its first patent ever was published in 2005. It filed its patents most often in United States and WIPO (World Intellectual Property Organization). Its main competitors in its focus markets computer technology, semiconductors and basic communication technologies are CHESEN ELECTRONICS CORP, ROOHPARVAR FRANKIE F and HSIAO CHIH-CHENG.

Patent filings in countries

World map showing BEDESCHI FERDINANDOs patent filings in countries

Patent filings per year

Chart showing BEDESCHI FERDINANDOs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Bedeschi Ferdinando 29
#2 Resta Claudio 7
#3 Gastaldi Roberto 6
#4 Amato Paolo 2
#5 Ferraro Marco 2
#6 Donze Enzo Michele 1
#7 Cabrini Alessandro 1
#8 Zhang Ruili 1
#9 Benvenuti Augusto 1
#10 Bellini Sandro 1

Latest patents

Publication Filing date Title
US2013318418A1 Adaptive error correction for phase change memory
US2013311837A1 Program-disturb management for phase change memory
US2013290604A1 Program-disturb decoupling for adjacent wordlines of a memory device
US2013262743A1 Encoding program bits to decouple adjacent wordlines in a memory device
US2013227369A1 Error detection or correction of stored signals after one or more heat events in one or more memory devices
US2013159796A1 Read bias management to reduce read errors for phase change memory
US2012182783A1 Programming an array of resistance random access memory cells using unipolar pulses
US2012092923A1 Read distribution management for phase change memory
US2010284212A1 Method for multilevel programming of phase change memory cells using adaptive reset pulses
WO2011080784A1 Methods for a phase-change memory array
WO2011080768A1 Memory devices comprising partitions with particular ecc attributes
US2013010533A1 Descending set verify for phase change memory
WO2011080769A1 Mixed mode programming for phase change memory
US2013040584A1 Apparatus and method for reading a phase-change memory cell
WO2011067795A1 Refresh architecture and algorithm for non-volatile memories
US2011113303A1 Method and apparatuses for customizable error correction of memory
US2010128517A1 Phase-change memory device with discharge of leakage currents in deselected bitlines and method for discharging leakage currents in deselected bitlines of a phase-change memory device
WO2010076834A1 Reliable set operation for phase-change memory cell
US2009091988A1 Writing bit alterable memories