|
US2013286721A1
|
|
Low sensing current non-volatile flip-flop
|
|
US2013194862A1
|
|
Non-volatile flip-flop
|
|
US2012275212A1
|
|
Self-body biasing sensing circuit for resistance-based memories
|
|
US2013002352A1
|
|
Sensing circuit
|
|
US2013003447A1
|
|
Sensing circuit
|
|
US2012113708A1
|
|
Stable SRAM bitcell design utilizing independent gate FinFET
|
|
US2012026783A1
|
|
Latching circuit
|
|
US2011235406A1
|
|
Low-power 5T SRAM with improved stability and reduced bitcell size
|
|
US2011178768A1
|
|
System and method of adjusting a resistance-based memory circuit parameter
|
|
US2011176350A1
|
|
Resistance-based memory with reduced voltage input/output device
|
|
US2010324850A1
|
|
Static noise margin estimation
|
|
US2010321976A1
|
|
Split path sensing circuit
|
|
US2009323404A1
|
|
Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell size
|
|
US2009265678A1
|
|
System and method of resistance based memory circuit parameter adjustment
|
