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APPLIED SPINTRONICS TECH INC

Overview
  • Total Patents
    46
About

APPLIED SPINTRONICS TECH INC has a total of 46 patent applications. Its first patent ever was published in 2003. It filed its patents most often in WIPO (World Intellectual Property Organization), United States and EPO (European Patent Office). Its main competitors in its focus markets computer technology, semiconductors and micro-structure and nano-technology are YI WEI, FUKAMI SHUNSUKE and HIGO YUTAKA.

Patent filings in countries

World map showing APPLIED SPINTRONICS TECH INCs patent filings in countries

Patent filings per year

Chart showing APPLIED SPINTRONICS TECH INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Tsang David 32
#2 Shi Xizeng 8
#3 Wang Po-Kang 5
#4 David Tsang 5
#5 Morris Robert Paul 4
#6 Yang Hsu Kai Karl 3
#7 Min Tai 2
#8 Hu David 2
#9 David Tsang David Shi Xizeng W 1
#10 Xizeng Shi 1

Latest patents

Publication Filing date Title
EP1661143A2 Method and system for providing a programmable current source for a magnetic memory
CN1849668A Method and system for providing a programmable current source for a magnetic memory
US2005276098A1 Method and system for providing common read and write word lines for a segmented word line MRAM array
CN1809929A MRAM architecture with a bit line located underneath the magnetic tunneling junction device
CN1791984A MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture
CN1879172A MRAM array with segmented word and bit lines
WO2005048265A1 Method and system for performing readout utilizing a self reference scheme
US6963500B2 Magnetic tunneling junction cell array with shared reference layer for MRAM applications
US6933550B2 Method and system for providing a magnetic memory having a wrapped write line
US6982916B2 Method and system for providing temperature dependent programming for magnetic memories
CN1748317A MRAM cells having magnetic write lines with a stable magnetic state at the end regions
CN1748323A High density and high programming efficiency mram design
CN1739166A MRAM memories utilizing magnetic write lines
US6982445B2 MRAM architecture with a bit line located underneath the magnetic tunneling junction device
US6870760B2 Method and system for performing readout utilizing a self reference scheme
US6909633B2 MRAM architecture with a flux closed data storage layer
US6940749B2 MRAM array with segmented word and bit lines
US6812538B2 MRAM cells having magnetic write lines with a stable magnetic state at the end regions
US6870759B2 MRAM array with segmented magnetic write lines
US7067866B2 MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture