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TANZAWA TORU

Overview
  • Total Patents
    38
  • GoodIP Patent Rank
    231,497
About

TANZAWA TORU has a total of 38 patent applications. Its first patent ever was published in 2005. It filed its patents most often in United States and Japan. Its main competitors in its focus markets computer technology, semiconductors and basic communication technologies are INTEGRATED MEMORY TECH INC, ADESTO TECHNOLOGIES CORP and JIANGSU ADVANCED MEMORY TECH CO LTD.

Patent filings in countries

World map showing TANZAWA TORUs patent filings in countries
# Country Total Patents
#1 United States 37
#2 Japan 1

Patent filings per year

Chart showing TANZAWA TORUs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Tanzawa Toru 38
#2 Ghalam Ali Feiz Zarrin 1
#3 Thimmegowda Deepak 1
#4 Murakoshi Tamotsu 1
#5 Tanaka Tomoharu 1

Latest patents

Publication Filing date Title
JP2019205329A Power inverter circuit and electric power unit
US2014061849A1 Three-dimensional devices having reduced contact length
US2014063959A1 Memory array with power-efficient read architecture
US2014061747A1 Memory array having connections going through control gates
US2014056077A1 Compensating for off-current in a memory
US2014056049A1 Memory devices having data lines included in top and bottom conductive lines
US2014056070A1 Apparatuses and methods involving accessing distributed sub-blocks of memory cells
US2014029352A1 Vertical memory with body connection
US2013308385A1 Apparatuses and methods for coupling load current to a common source
US2013308387A1 Memory read apparatus and methods
US2013258745A1 Memory having memory cell string and coupling components
US2013223150A1 Apparatus and methods for applying a non-zero voltage differential across a memory cell not involved in an access operation
US2013182510A1 Memory devices and programming methods that program a memory cell with a data value, read the data value from the memory cell and reprogram the memory cell with the read data value
US2013163305A1 Apparatuses and methods including memory with top and bottom data lines
US2013146980A1 Apparatuses and methods for transposing select gates
US2013107620A1 Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate
US2013051161A1 Apparatuses and methods including memory write operation
US2013028023A1 Apparatuses and methods including memory array and data line architecture
US2013028024A1 Apparatuses and methods including memory array data line selection
US2012300556A1 Devices and systems including enabling circuits