Cpu security mechanisms employing thread-specific protection domains
US2016011871A1
Computer processor employing explicit operations that support execution of software pipelined loops and a compiler that utilizes such operations for scheduling software pipelined loops
US2015220343A1
Computer Processor Employing Phases of Operations Contained in Wide Instructions
US2016274810A1
CPU security mechanisms employing thread-specific protection domains
US2016239312A1
Computer Processor Employing Phases of Operations Contained in Wide Instructions
WO2015089314A1
Computer processor employing operand data with associated meta-data