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INTRINSITY INC

Overview
  • Total Patents
    75
About

INTRINSITY INC has a total of 75 patent applications. Its first patent ever was published in 1998. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and Australia. Its main competitors in its focus markets computer technology, basic communication technologies and measurement are RAMARAJU RAVINDRARAJ, CAPITAL MICROELECTRONICS CO LTD and ELBRUS INTERNAT LTD.

Patent filings in countries

World map showing INTRINSITY INCs patent filings in countries

Patent filings per year

Chart showing INTRINSITY INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Blomgren James S 58
#2 Potter Terence M 30
#3 Petro Anthony M 24
#4 Horne Stephen C 18
#5 Seningen Michael R 14
#6 Boehm Fritz A 11
#7 Brooks Jeffrey S 8
#8 Amstutz Kenneth D 4
#9 Booth Jean Anne 4
#10 Glowka Donald W 3

Latest patents

Publication Filing date Title
WO2010053603A1 Method for piecewise hierarchical sequential verification
US2005060128A1 Physical realization of dynamic logic using parameterized tile partitioning
US2004139423A1 Expansion syntax
US7053664B2 Null value propagation for FAST14 logic
US6956406B2 Static storage element for dynamic logic
US6714045B2 Static transmission of FAST14 logic 1-of-N signals
US7346484B2 Monitor manager that creates and executes state machine-based monitor instances in a digital simulation
US6898691B2 Rearranging data between vector and matrix forms in a SIMD matrix processor
US6732346B2 Generation of route rules
US7099812B2 Grid that tracks the occurrence of a N-dimensional matrix of combinatorial events in a simulation using a linear index
US6728654B2 Random number indexing method and apparatus that eliminates software call sequence dependency
US6745357B2 Dynamic logic scan gate method and apparatus
US2002067187A1 Method for calculating dynamic logic block propagation delay targets using time borrowing
US6557021B1 Rounding anticipator for floating point operations
US6622240B1 Method and apparatus for pre-branch instruction
US6412085B1 Method and apparatus for a special stress mode for N-NARY logic that initializes the logic into a functionally illegal state
US6271683B1 Dynamic logic scan gate method and apparatus
US6415405B1 Method and apparatus for scan of synchronized dynamic logic using embedded scan gates
AU2712300A Method and apparatus for routing 1 of n signals
US6594803B1 Method and apparatus that reports multiple status events with a single monitor