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Remote computer interface
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Memory system architecture
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Hybrid phase-locked loop employing analog and digital loop filters
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Multi-directional small signal transceiver/repeater
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Method and apparatus for fast clock recovery phase-locked loop with training capability
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Simplification of lookup table
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Floating point unit pipeline synchronized with processor pipeline
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Microprocessor including floating point unit with 16-bit fixed length instruction set
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Fast method of floating-point multiplication and accumulation
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Method and apparatus for averaging clock skewing in clock distribution network
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Method and apparatus for adaptive clock deskewing
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Logic circuit simulator and logic simulation method having reduced number of simulation events
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Method and apparatus for optimizing high speed performance and hot carrier lifetime in a MOS integrated circuit
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Device for multi-precision and block arithmetic support in digital processors
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Digital peak and valley detector
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