| # | Country | Total Patents | |
|---|---|---|---|
| #1 | Japan | 6 | |
| #2 | United States | 6 | |
| #3 | Germany | 2 | |
| #4 | EPO (European Patent Office) | 1 | |
| #5 | Taiwan | 1 |
| # | Industry | |
|---|---|---|
| #1 | Computer technology | |
| #2 | Semiconductors | |
| #3 | Basic communication technologies | |
| #4 | Measurement |
| # | Technology | |
|---|---|---|
| #1 | Static stores | |
| #2 | Semiconductor devices | |
| #3 | Measuring electric variables | |
| #4 | Pulse technique |
| # | Name | Total Patents |
|---|---|---|
| #1 | Han Kyung Joon | 9 |
| #2 | Hecht Volker | 9 |
| #3 | Peng Jack Zezhong | 9 |
| #4 | Broze Robert U | 9 |
| #5 | Levchenko Victor | 6 |
| #6 | Robert M Salter Iii | 4 |
| #7 | Salter Iii Robert M | 3 |
| #8 | Freeman Richard D | 2 |
| #9 | Saxe Timothy | 2 |
| #10 | Broze Robert V | 1 |
| Publication | Filing date | Title |
|---|---|---|
| US6125059A | Method for erasing nonvolatile memory cells in a field programmable gate array | |
| US6072720A | Nonvolatile reprogrammable interconnect cell with programmable buried bitline | |
| US6137728A | Nonvolatile reprogrammable interconnect cell with programmable buried source/drain in sense transistor | |
| US5838040A | Nonvolatile reprogrammable interconnect cell with FN tunneling in sense | |
| US5894148A | Floating gate FPGA cell with counter-doped select device |