| # | Country | Total Patents | |
|---|---|---|---|
| #1 | United States | 11 |
| # | Industry | |
|---|---|---|
| #1 | Semiconductors | |
| #2 | Micro-structure and nano-technology | |
| #3 | Machines |
| # | Technology | |
|---|---|---|
| #1 | Semiconductor devices | |
| #2 | Unspecified technologies | |
| #3 | Nanostructure applications |
| # | Name | Total Patents |
|---|---|---|
| #1 | Furukawa Toshiharu | 11 |
| #2 | Horak David V | 8 |
| #3 | Holmes Steven J | 5 |
| #4 | Koburger Iii Charles W | 5 |
| #5 | Hakey Mark C | 3 |
| #6 | Koburger Charles W | 2 |
| #7 | Robison Robert R | 1 |
| #8 | Koburger Charles W Iii | 1 |
| #9 | Slinkman James Albert | 1 |
| #10 | Koburger Iii Charles William | 1 |
| Publication | Filing date | Title |
|---|---|---|
| US2012018806A1 | Semiconductor-on-insulator (SOI) structure with selectively placed sub-insulator layer void(s) and method of forming the SOI structure | |
| US2008217730A1 | Methods of forming gas dielectric and related structure | |
| US2008085600A1 | Method of forming lithographic and sub-lithographic dimensioned structures | |
| US2005227498A1 | Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby |