|
US2021019114A1
|
|
Configurable non-volatile arithmetic memory operators
|
|
CN111916456A
|
|
Scalable logic gate non-volatile memory array and method of making same
|
|
CN111507463A
|
|
Neuromorphic symbol processor and method of operating the same
|
|
US2020203359A1
|
|
Methods of erasing semiconductor non-volatile memories
|
|
US10431308B1
|
|
Memory cell size reduction for scalable logic gate non-volatile memory arrays
|
|
US2019311255A1
|
|
Neuromorphic code processor
|
|
US10147492B1
|
|
MOSFET threshold voltage sensing scheme for non-volatile memory
|
|
US2018205368A1
|
|
Standby current reduction in digital circuitries
|
|
CN107658298A
|
|
Recessed channel Nonvolatile semiconductor memory device and its manufacture method
|
|
US9754668B1
|
|
Digital perceptron
|
|
US2017033116A1
|
|
Recess channel semiconductor non-volatile memory device and fabricating the same
|
|
CN106205685A
|
|
The non-volatile content that can plan can addressing memory and operational approach thereof
|
|
US2016203868A1
|
|
Configurable non-volatile content addressable memory
|
|
US2014369135A1
|
|
Ultra-low power programming method for N-channel semiconductor non-volatile memory
|
|
US2014239999A1
|
|
Multiple-time configurable non-volatile look-up-table
|
|
TW201431047A
|
|
3-d single floating gate non-volatile memory device
|
|
US2014177348A1
|
|
Non-volatile register and non-volatile shift register
|
|
TW201423752A
|
|
Structures and operational methods of non-volatile dynamic random access memory devices
|
|
US2014140139A1
|
|
Interconnection matrix using semiconductor non-volatile memory
|
|
US2014097483A1
|
|
3-D single floating gate non-volatile memory device
|
