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TRU SI TECHNOLOGIES INC

Overview
  • Total Patents
    83
About

TRU SI TECHNOLOGIES INC has a total of 83 patent applications. Its first patent ever was published in 1997. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and EPO (European Patent Office). Its main competitors in its focus markets semiconductors, machines and electrical machinery and energy are INTELLIGENT SOURCES DEV CORP, TRAN LUAN C and SUPER NOVA OPTOELECTRONICS CORP.

Patent filings per year

Chart showing TRU SI TECHNOLOGIES INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Siniaguine Oleg 49
#2 Savastiouk Sergey 25
#3 Berger Alexander J 17
#4 Kretz Frank E 16
#5 Halahan Patrick B 16
#6 Kao Sam 15
#7 Casarotti Sean A 12
#8 Berger Alex 6
#9 Halahan Patrick 5
#10 Bagriy Igor 5

Latest patents

Publication Filing date Title
US2008302481A1 Method and apparatus for debonding of structures which are bonded together, including (but not limited to) debonding of semiconductor wafers from carriers when the bonding is effected by double-sided adhesive tape
US2007257367A1 Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniques
US7060601B2 Packaging substrates for integrated circuits and soldering methods
US7049170B2 Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
US6759341B1 Wafering method comprising a plasma etch with a gas emitting wafer holder
US6897148B2 Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
US6899788B2 Article holders that use gas vortices to hold an article in a desired position
US6730540B2 Clock distribution networks and conductive lines in semiconductor integrated circuits
US6882030B2 Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
US6787916B2 Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity
US2003014158A1 Alignment of semiconductor wafers and other articles
US2003018410A1 Articles holders with sensors detecting a type of article held by the holder
US6638004B2 Article holders and article positioning methods
US6498074B2 Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
US6498381B2 Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same
US6717254B2 Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture
WO0156063A2 Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
US6448153B2 Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
US6749764B1 Plasma processing comprising three rotational motions of an article being processed
US6427991B1 Non-contact workpiece holder using vortex chuck with central gas flow