TESEDA CORP has a total of 12 patent applications. It decreased the IP activity by 100.0%. Its first patent ever was published in 2002. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and EPO (European Patent Office). Its main competitors in its focus markets measurement and computer technology are CHECKSUM LLC, ZEHNTEL INC and MEMBRAIN LTD.
# | Country | Total Patents | |
---|---|---|---|
#1 | United States | 8 | |
#2 | WIPO (World Intellectual Property Organization) | 2 | |
#3 | EPO (European Patent Office) | 1 | |
#4 | Republic of Korea | 1 |
# | Industry | |
---|---|---|
#1 | Measurement | |
#2 | Computer technology |
# | Technology | |
---|---|---|
#1 | Measuring electric variables | |
#2 | Static stores | |
#3 | Electric digital data processing |
# | Name | Total Patents |
---|---|---|
#1 | Limaye Ajit M | 5 |
#2 | Decher Peter H | 4 |
#3 | Sanchez Ralph | 3 |
#4 | Niehaus Horst Roland | 3 |
#5 | Akar Armagan | 2 |
#6 | Ackerman Rich | 2 |
#7 | Bernard Theodore Clifton | 2 |
#8 | Raykowski John | 2 |
#9 | Morris Steven R | 2 |
#10 | Levy Andrew H | 2 |
Publication | Filing date | Title |
---|---|---|
US10247777B1 | Detecting and locating shoot-through timing failures in a semiconductor integrated circuit | |
US2015149106A1 | Field triage of EOS failures in semiconductor devices | |
US2014115551A1 | Correlation of device manufacturing defect data with device electrical test data | |
US2014115412A1 | Scan chain fault diagnosis | |
WO2007114930A2 | Secure test-for-yield chip diagnostics management system and method | |
WO2004106955A1 | Tester architecture for testing semiconductor integrated circuits | |
US2004078165A1 | Scan test viewing and analysis tool | |
US2004068699A1 | Single board DFT integrated circuit tester |