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SUNEDISON SEMICONDUCTOR LTD UEN201334164H

Overview
  • Total Patents
    54
  • GoodIP Patent Rank
    31,742
  • Filing trend
    ⇧ 12.0%
About

SUNEDISON SEMICONDUCTOR LTD UEN201334164H has a total of 54 patent applications. It increased the IP activity by 12.0%. Its first patent ever was published in 2012. It filed its patents most often in United States. Its main competitors in its focus markets semiconductors, surface technology and coating and basic materials chemistry are NITRONEX CORP, DARGIS RYTIS and UBILUX OPTOELECTRONICS CORP.

Patent filings in countries

World map showing SUNEDISON SEMICONDUCTOR LTD UEN201334164Hs patent filings in countries
# Country Total Patents
#1 United States 54

Patent filings per year

Chart showing SUNEDISON SEMICONDUCTOR LTD UEN201334164Hs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Libbert Jeffrey L 13
#2 Wang Gang 8
#3 Peidous Igor 8
#4 Liu Qingmin 8
#5 Thomas Shawn George 5
#6 Samanta Gaurab 5
#7 Orschel Benno 4
#8 Kommu Srikanth 4
#9 Seacrist Michael R 3
#10 Lu Tse-Wei 3

Latest patents

Publication Filing date Title
US2018114720A1 High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
US2017372946A1 High resistivity silicon-on-insulator substrate comprising an isolation region
US2017256442A1 Semiconductor on insulator structure comprising a sacrificial layer and method of manufacture thereof
US2017191182A1 Seed chuck assemblies and crystal pulling systems for reducing deposit build-up during crystal growth process
US2017178890A1 Semiconductor substrate polishing methods with dynamic control
US2017145587A1 Crystal pulling system and method for inhibiting precipitate build-up in exhaust flow path
US2017115063A1 Semiconductor wafer support ring for heat treatment
US2018056545A1 Methods and system for controlling a surface profile of a wafer
US2017053826A1 Semiconductor substrate polishing methods and slurries and methods for manufacturing silicon on insulator structures
US2017022631A1 Crystal growing systems and methods including a transparent crucible
US2017011505A1 Wafer nanotopography metrology for lithography based on thickness maps
US2017001281A1 Methods and systems for polishing pad control
US2016340799A1 Epitaxy reactor and susceptor system for improved epitaxial wafer flatness
US2016289830A1 Substrate processing systems having multiple gas flow controllers
US2018233400A1 Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
US2016071958A1 High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
US2016071760A1 High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
US2015357180A1 Methods for cleaning semiconductor substrates
US2015126017A1 Systems and methods for ultrasonically cleaving a bonded wafer pair
US2017025307A1 Methods for preparing layered semiconductor structures