SOITEC SILICON ON INSULATOR TECHNOLOGIES SA innovation strategy

Patent filings in countries

#	Industry
#1	Semiconductors
#2	Surface technology and coating
#3	Machines
#4	Measurement
#5	Electrical machinery and energy
#6	Chemical engineering
#7	Environmental technology
#8	Machine tools

#	Technology
#1	Semiconductor devices
#2	Single-crystal-growth
#3	Unspecified technologies
#4	Unspecified technologies
#5	Measuring length, angles and areas
#6	Cleaning
#7	Analysing materials
#8	Soldering, welding and flame cutting
#9	Climate change mitigation in goods production
#10	Lighting device details

Publication	Filing date	Title
FR2925762A1	2007-12-21	Heterostructure fabricating method for complementary MOS device in e.g. electronic field, involves depositing silicon layers using vector gas and gaseous derivative of silicon, where vector gas is inert with respect to derivative
JP2005109478A	2004-09-24	Method for manufacturing substrate for epitaxial growth
JP2004343052A	2004-01-27	Method for manufacturing strained crystalline layer on insulator, semiconductor structure by same method, and manufactured semiconductor structure
JP2004343046A	2004-01-13	Compliant substrate for heteroepitaxy, heteroepitaxial structure, and compliant-substrate fabricating method
JP2004200682A	2003-12-10	Manufacturing method for material complex
JP2004279402A	2003-10-14	Method of evaluating particle concentration in atmosphere of clean room or mini-environment