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SHANGHAI ANLOGIC INFORMATION TECH CO LTD

Overview
  • Total Patents
    76
  • GoodIP Patent Rank
    19,232
  • Filing trend
    ⇧ 300.0%
About

SHANGHAI ANLOGIC INFORMATION TECH CO LTD has a total of 76 patent applications. It increased the IP activity by 300.0%. Its first patent ever was published in 2015. It filed its patents most often in China. Its main competitors in its focus markets computer technology, basic communication technologies and control are FARADAY TECH CORPORATION, SHENZHEN PANGO MICROSYSTEMS CO LTD and AMPERE COMPUTING LLC.

Patent filings in countries

World map showing SHANGHAI ANLOGIC INFORMATION TECH CO LTDs patent filings in countries
# Country Total Patents
#1 China 76

Patent filings per year

Chart showing SHANGHAI ANLOGIC INFORMATION TECH CO LTDs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Bian Lijian 8
#2 Luo Kexin 8
#3 Zheng Li 5
#4 Zhou Jianchong 5
#5 Yu Jiande 4
#6 Wang Yuan 4
#7 Hou Jiao 4
#8 Ma Chengsen 4
#9 Qiu Bin 4
#10 Liu Zhihua 3

Latest patents

Publication Filing date Title
CN112187214A IO impedance calibration circuit and method of FPGA
CN112104362A Method and system for controlling multi-channel clock to determine phase relation output
CN111935119A Data encryption authentication method and data encryption authentication system
CN111737192A Embedded DDR hardcore of FPGA and FPGA
CN111933206A Built-in self-test method and test system for DDR physical layer address command path
CN111934680A Output frequency calibration method and output frequency calibration system
CN111597073A FPGA single event upset error correction method and circuit
CN111697950A Intrinsic linear phase interpolator
CN111665894A Low dropout voltage regulator
CN111665893A Low dropout regulator of NMOS output power tube
CN111638745A Low dropout regulator of NMOS output power tube
CN111650987A Low dropout regulator of PMOS output power tube
CN111654097A Power supply switching circuit
CN111596118A Current detection circuit and low dropout regulator circuit
CN111522385A Low dropout regulator of PMOS output power tube
CN111709201A FPGA configuration module and implementation method and circuit for test signal grouping output thereof
CN111835335A Clock structure of field programmable gate array and adjusting method thereof
CN111610846A FPGA internal DSP and power consumption reduction method thereof
CN111506519A Method and system for distributing SRAM unit for FPGA code point
CN111459712A SRAM type FPGA single event upset error correction method and single event upset error correction circuit