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SCHEUERLEIN ROY E

Overview
  • Total Patents
    47
About

SCHEUERLEIN ROY E has a total of 47 patent applications. Its first patent ever was published in 2005. It filed its patents most often in United States. Its main competitors in its focus markets computer technology, semiconductors and micro-structure and nano-technology are LOWREY TYLER, ICHIHARA REIKA and QIMONDA NORTH AMERICA CORP.

Patent filings in countries

World map showing SCHEUERLEIN ROY Es patent filings in countries
# Country Total Patents
#1 United States 47

Patent filings per year

Chart showing SCHEUERLEIN ROY Es patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Scheuerlein Roy E 47
#2 Fasoli Luca G 6
#3 Yan Tianhong 4
#4 Ilkbahar Alper 4
#5 Petti Christopher J 4
#6 Tanaka Yoichiro 3
#7 Thakur Randhir 2
#8 Harari Eliyahou 2
#9 Moore Christopher 2
#10 Chen Yung-Tin 1

Latest patents

Publication Filing date Title
US2012127779A1 Re-writable resistance-switching memory with balanced series stack
US2013188431A1 Temperature compensation of conductive bridge memory arrays
US2012044733A1 Single device driver circuit to control three-dimensional memory element array
US2011019495A1 Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
US2011149631A1 Rewritable memory device with multi-level, write-once memory cells
US2009256132A1 Memory cell that includes a carbon-based memory element and methods of forming the same
US2010254175A1 Cross point non-volatile memory cell
US2010254176A1 Multi-bit resistance-switching memory cell
US2010155784A1 Three-dimensional memory structures having shared pillar memory cells
US2009323393A1 Capacitive discharge method for writing to non-volatile memory
US2009166682A1 Methods and apparatus for forming memory lines and vias in three dimensional memory arrays using dual damascene process and imprint lithography
US2009172321A1 Storage sub-system for a computer comprising write-once memory devices and write-many memory devices and related method
US2008023790A1 Mixed-use memory array
US2008025069A1 Mixed-use memory array with different data states
US2006273404A1 TFT charge storage memory cell having high-mobility corrugated channel