RF FRONTEND INTERFACE FOR A 61 GHz RADIO POWERED COMMUNICATION TAG DEVICE
DE102019116215A1
Memory chip, especially SRAM macro
US2020162072A1
Slew-limited output driver circuit
WO2019025030A1
Method for characterization of standard cells with adaptive body biasing
DE102013206300A1
Hardware Performance Monitor for microelectronic circuits with adaptive power supply control
DE102012110320A1
Circuit architecture for use in system for measuring and compensating signal delay on source synchronous clocked data buses, has multiplexer for selecting core clock or sampling clock for clocking clockable receiving unit of data line
DE102012202298A1
Apparatus and method for driving long signal lines in integrated circuits
