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ONESPIN SOLUTIONS GMBH

Overview
  • Total Patents
    36
  • GoodIP Patent Rank
    108,749
  • Filing trend
    0.0%
About

ONESPIN SOLUTIONS GMBH has a total of 36 patent applications. It increased the IP activity by 0.0%. Its first patent ever was published in 2001. It filed its patents most often in EPO (European Patent Office), United States and Luxembourg. Its main competitors in its focus markets computer technology, measurement and digital networks are HYDUKE STANLEY M, SYNOPSYS SHANGHAI INC and MAGIMA DIGITAL INFORMATION CO.

Patent filings per year

Chart showing ONESPIN SOLUTIONS GMBHs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Strasser Dominik 8
#2 Bormann Joerg 6
#3 Grosse Jörg 6
#4 Brinkmann Raik 6
#5 Warkentin Peter 4
#6 Beyer Sven 4
#7 Lanik Jan 3
#8 Rafaila Monica 3
#9 Fit Mirko 3
#10 Niesler Gerrit 3

Latest patents

Publication Filing date Title
US2021064810A1 Method to Perform Hardware Safety Analysis without Fault Simulation
LU101294B1 Method of checking equivalence between a first design comprising a shift register logic srl chain and a second design
EP3474196A1 Method of selecting a prover
US2020200820A1 System and method for formal fault propagation analysis
EP3642637A1 System and method for formal fault propagation analysis
LU100491B1 Method of selecting a prover
US2019121919A1 Method of selecting a prover
LU100321B1 Method for formal circuit verification
US2018364298A1 System and method for formal circuit verification
US2014325669A1 Cloud-basd digital verification system and method
LU92188A1 Cloud-based digital verification system and method
EP2546767A1 Digital circuit verification monitor
US2009204932A1 Equivalence verification between transaction level models and RTL at the example to processors
EP2088521A1 Method for verifying
JP2008181490A Equivalence verification between transaction level model and register transfer level in instance of processor
EP1933245A1 Equivalence verification between transaction level models and RTL examples of processors
EP1916534A1 Verification and generation of timing exceptions
EP1764715A1 Method for determining the quality of a set of properties, applicable for the verification and specification of circuits
DE10325513A1 Method and apparatus for creating a behavioral aspect of a formal verification circuit
EP1424641A1 Method for determining the minimum or the maximum switching activity of a digital circuit