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MEARS TECHNOLOGIES INC

Overview
  • Total Patents
    143
  • GoodIP Patent Rank
    184,791
About

MEARS TECHNOLOGIES INC has a total of 143 patent applications. Its first patent ever was published in 2003. It filed its patents most often in United States, Taiwan and Australia. Its main competitors in its focus markets semiconductors, micro-structure and nano-technology and electrical machinery and energy are RJ MEARS LLC, JIANGMEN ORIENT OPTO ELECTRONICS CO LTD and NITEK INC.

Patent filings in countries

World map showing MEARS TECHNOLOGIES INCs patent filings in countries

Patent filings per year

Chart showing MEARS TECHNOLOGIES INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Mears Robert J 63
#2 Kreps Scott A 50
#3 Hytha Marek 38
#4 Rao Kalipatnam Vivek 32
#5 Dukovski Ilija 29
#6 Stephenson Robert John 26
#7 Halilov Samed 17
#8 Yiptong Jean Augustin Chan Sow Fook 16
#9 Huang Xiangyang 16
#10 Marek Hytha 11

Latest patents

Publication Filing date Title
WO2015077580A1 Semiconductor devices including superlattice depletion layer stack and related methods
WO2011112574A1 Semiconductor device including a superlattice and dopant diffusion retarding implants and related methods
US2008258134A1 Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures
WO2008101232A1 Multiple-wavelength opto- electronic device including a semiconductor atomic superlattice and associated fabrication methods
US2008179664A1 Semiconductor device with a vertical MOSFET including a superlattice and related methods
US2008179588A1 Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods
CA2650809A1 Semiconductor device including a floating gate memory cell with a superlattice channel and associated methods
EP2016621A1 Semiconductor device having a semiconductor-on-insulator configuration and a superlattice and associated methods
CN101467259A Semiconductor device including a dopant blocking superlattice and associated methods
WO2007130973A1 Semiconductor device including a dopant blocking superlattice and associated methods
AU2007227418A1 Spintronic devices with constrained spintronic dopant and associated methods
US2007238274A1 Methods of making spintronic devices with constrained spintronic dopant
US2008012004A1 Spintronic devices with constrained spintronic dopant
US2007194298A1 Semiconductor device comprising a lattice matching layer
US2008197340A1 Multiple-wavelength opto-electronic device including a superlattice
US2008197341A1 Method for making a multiple-wavelength opto-electronic device including a superlattice
US2007161138A1 Method for making an electronic device including a poled superlattice having a net electrical dipole moment
CN101371363A Semiconductor device including a front side strained superlattice layer and a back side stress layer and associated methods
US2007012911A1 Semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance
US2007012999A1 Method for making a semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance