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Op-code based built-in-self-test
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Monitoring and compensating for real time local circuit speed in an integrated circuit
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Qualified data strobe signal for double data rate memory controller module
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Digitally controlled oscillator and associated method
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High resolution digital loop circuit
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High resolution digital delay circuit for PLL and DLL
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Circuitry and methods for efficient FIFO memory
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High-gain synchronizer circuitry and methods
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Address lookup apparatus having memory and content addressable memory
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Using local reduction in model checking to identify faults in logically correct circuits
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Diagonal matrix delay
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Queue memory management
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Phase detector
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Jitter producing circuitry and methods
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Extended model checking hardware verification
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Error-correction memory architecture for testing production errors
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Lock phase circuit
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Inverted-phase detector
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