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Wiring substrate features having controlled sidewall profiles
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Printed wiring board with controlled line impedance
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Wiring substrate with thermal insert
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Isolated flip chip or BGA to minimize interconnect stress due to thermal mismatch
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Method for forming low-impedance high-density deposited-on-laminate structures having reduced stress
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Low-impedance high-density deposited-on-laminate structures having reduced stress
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Method and structure for detecting open vias in high density interconnect substrates
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Deposited thin film build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates
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Method of planarizing thin film layers deposited over a common circuit base
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Method for controlling stress in thin film layers deposited over a high density interconnect common circuit base
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