Learn more

INOTERA MEMORIES INC

Overview
  • Total Patents
    401
  • GoodIP Patent Rank
    10,585
About

INOTERA MEMORIES INC has a total of 401 patent applications. Its first patent ever was published in 2006. It filed its patents most often in Taiwan, United States and China. Its main competitors in its focus markets semiconductors, control and environmental technology are GLOBALFOUNDRIES SINGAPORE PTE, WUXI CHINA RESOURCES HUAJING MICROELECTRONICS CO L and SEMICONDUCTOR MFG INT CORP.

Patent filings in countries

World map showing INOTERA MEMORIES INCs patent filings in countries

Patent filings per year

Chart showing INOTERA MEMORIES INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Lee Tzung Han 51
#2 Hu Yaw-Wen 36
#3 Shih Shing-Yih 34
#4 Lee Tzung-Han 30
#5 Huang Chung Lin 29
#6 Shih Neng-Tai 27
#7 Chen Chun Chi 25
#8 Chiang Hsu 24
#9 Wu Tieh-Chiang 24
#10 Tian Yun-Zong 23

Latest patents

Publication Filing date Title
US9613820B1 Method of forming patterns
US9570369B1 Semiconductor package with sidewall-protected RDL interposer and fabrication method thereof
US9613895B1 Semiconductor package with double side molding
US9576931B1 Method for fabricating wafer level package
US9419001B1 Method for forming cell contact
US9576933B1 Fan-out wafer level packaging and manufacturing method thereof
TW201717343A Package-on-package assembly and method for manufacturing the same
US9607967B1 Multi-chip semiconductor package with via components and method for manufacturing the same
US9449953B1 Package-on-package assembly and method for manufacturing the same
US9379197B1 Recess array device
TWI560853B Cell contact structure
US2017062240A1 Method for manufacturing a wafer level package
TW201701429A Wafer level package and fabrication method thereof
US9543270B1 Multi-device package and manufacturing method thereof
US2017033100A1 Memory device and fabricating method thereof
US9449935B1 Wafer level package and fabrication method thereof
US9472664B1 Semiconductor device and manufacturing method thereof
US2017012028A1 Recoverable device for memory base product
US9520333B1 Wafer level package and fabrication method thereof
US2016365334A1 Package-on-package assembly and method for manufacturing the same