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INMOS CORP

Overview
  • Total Patents
    121
About

INMOS CORP has a total of 121 patent applications. Its first patent ever was published in 1980. It filed its patents most often in United States, EPO (European Patent Office) and Japan. Its main competitors in its focus markets semiconductors, computer technology and machines are SEMI SOLUTIONS LLC, SAMSUNG SEMICONDUCTOR TELE and SYNERGY SEMICONDUCTOR CORP.

Patent filings per year

Chart showing INMOS CORPs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Hardee Kim C 21
#2 Sud Rahul 20
#3 Bourassa Ronald R 11
#4 Heightley John D 7
#5 Wooten David R 7
#6 Hanson Matthew V 7
#7 Ryden William D 7
#8 Hardee Kim Carver 7
#9 Derbenwick Gary F 7
#10 Adams James R 7

Latest patents

Publication Filing date Title
US4935801A Metallic fuse with optically absorptive layer
US4784973A Semiconductor contact silicide/nitride process with control for silicide thickness
US4791296A Fast method of measuring phosphorous concentration in PSG and BPSG films
EP0263574A1 A method of manufacturing a semiconductor device, and a semiconductor device, having at least one selectively actuable conductive line
EP0258962A2 Semiconductor devices having selectively actuable links and a method of manufacturing said devices
US4835118A Non-destructive energy beam activated conductive links
US4766333A Current sensing differential amplifier
EP0242962A1 Offset pad semiconductor lead frame
US4826785A Metallic fuse with optically absorptive layer
US4980752A Transition metal clad interconnect for integrated circuits
EP0200372A2 Self-aligned contact window formation in an integrated circuit
US4679170A Resistor with low thermal activation energy
US4698526A Source follower CMOS input buffer
US4680762A Method and apparatus for locating soft cells in a ram
US4570244A Bootstrap driver for a static RAM
US4604789A Process for fabricating polysilicon resistor in polycide line
US4656612A Dram current control technique
JPS60154394A Bit line load for semiconductor memory
US4660178A Multistage decoding
EP0323876A2 Bit line load and column circuitry for a semiconductor memory