|
US2016172199A1
|
|
Nanocrystal memory and methods for forming same
|
|
US2016064082A1
|
|
Semiconductor memory cell and driver circuitry with gate oxide formed simultaneously
|
|
US2016035848A1
|
|
Method of forming split gate memory with improved reliability
|
|
US8932925B1
|
|
Split-gate non-volatile memory (NVM) cell and device structure integration
|
|
US2015001606A1
|
|
Methods and structures for a split gate memory cell structure
|
|
US2015001612A1
|
|
Non-volatile memory (NVM) and high voltage transistor integration
|
|
US2014321213A1
|
|
Biasing split gate memory cell during power-off mode
|
|
US2014209995A1
|
|
Non-Volatile Memory Cells Having Carbon Impurities and Related Manufacturing Methods
|
|
US2014036568A1
|
|
Reram device structure
|
|
US2014003155A1
|
|
Split gate programming
|
|
US2013264533A1
|
|
ReRAM device structure
|
