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CHIPMOS TECHNOLIGIES INC

Overview
  • Total Patents
    31
  • GoodIP Patent Rank
    239,602
  • Filing trend
    ⇩ 100.0%
About

CHIPMOS TECHNOLIGIES INC has a total of 31 patent applications. It decreased the IP activity by 100.0%. Its first patent ever was published in 2007. It filed its patents most often in China and Taiwan. Its main competitors in its focus markets semiconductors are TAKAYA HIDEFUMI, SUZHOU NENGWU ELECTRONIC TECH CO LTD and YINGXINDA CO LTD.

Patent filings in countries

World map showing CHIPMOS TECHNOLIGIES INCs patent filings in countries
# Country Total Patents
#1 China 21
#2 Taiwan 10

Patent filings per year

Chart showing CHIPMOS TECHNOLIGIES INCs patent filings per year from 1900 to 2020

Focus industries

# Industry
#1 Semiconductors

Focus technologies

# Technology
#1 Semiconductor devices

Top inventors

# Name Total Patents
#1 Hou Po Kai 4
#2 Shen Geng Shin 3
#3 Shiwen Zhou 3
#4 Chen Tsung Lung 2
#5 Chou Shih-Wen 2
#6 Lai Kuei Yu 2
#7 Yutang Pan 2
#8 Shen Gengxin 2
#9 Wang Wei David 2
#10 Liu An Hong 2

Latest patents

Publication Filing date Title
CN102468187A Chip packaging structure and chip packaging method
CN102194707A Method for manufacturing semiconductor structure
CN101950745A Semiconductor packaging structure and producing method thereof
CN102104021A Wafer dicing method
CN102024775A Semiconductor structure and manufacturing method thereof
CN101937887A Wafer structure and water processing method
CN101872715A Wafer defect marking system
TW201037800A Cavity chip package structure and package-on-package using the same
TW201037793A Cavity chip package structure and package-on-package using the same
CN101853835A Manufacturing method of flip chip package
CN101853791A Manufacturing method and structure of flip chip package as well as structure of wafer coating
CN101740406A Method for manufacturing square flat pin-free encapsulation
TW201019404A Method of fabricating quad flat non-leaded package
TW201013873A Chip package
TW201005841A Chip package
CN101556303A Wafer test system for integrating radio frequency identification and test method thereof
TW200939411A Chip structure
CN101527292A Chip packaging structure
TW200935565A Optical chip-package and packaging process thereof
CN101399090A Holding jaw mechanism, test socket mechanism and storage module positioning device