|
US2009154278A1
|
|
Memory device with self-refresh operations
|
|
TW200823912A
|
|
Dynamic memory refresh configurations and leakage control methods
|
|
US2008031068A1
|
|
Dynamic memory refresh configurations and leakage control methods
|
|
TW200721163A
|
|
Low power memory control circuits and methods
|
|
CN101228633A
|
|
Source transistor configurations and control methods
|
|
TW200625310A
|
|
High speed and low power SRAM macro architecture and method
|
|
EP1761931A2
|
|
Internal voltage generator scheme and power management method
|
|
TW200603157A
|
|
1t1c sram
|
|
EP1803045A2
|
|
Cmos constant voltage generator
|
|
TW200609941A
|
|
Low voltage operation DRAM control circuits
|
|
CN1898744A
|
|
Low voltage operation dram control circuits
|
|
KR20060041232A
|
|
1t1c sram
|
|
CN1816882A
|
|
Sram cell structure and circuits
|
