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XILINX INC

Overview
  • Total Patents
    5,595
  • GoodIP Patent Rank
    854
  • Filing trend
    ⇧ 33.0%
About

XILINX INC has a total of 5,595 patent applications. It increased the IP activity by 33.0%. Its first patent ever was published in 1984. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and EPO (European Patent Office). Its main competitors in its focus markets computer technology, basic communication technologies and semiconductors are MICROCHIP TECH INC, NUVOTON TECHNOLOGY CORP and ALTERA CORP.

Patent filings per year

Chart showing XILINX INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Young Steven P 273
#2 Trimberger Stephen M 260
#3 Dick Christopher H 131
#4 New Bernard J 127
#5 Upadhyaya Parag 126
#6 Lesea Austin H 122
#7 Karp James 105
#8 Hart Michael J 99
#9 Bauer Trevor J 97
#10 Goetting F Erich 90

Latest patents

Publication Filing date Title
WO2021007376A1 Root monitoring on an fpga using satellite adcs
US10944417B1 Radio frequency DAC with improved linearity using shadow capacitor switching
US10944414B1 Method and apparatus for psuedo-random interleaved analog-to-digital converter use
US10985764B1 Phase detector offset to resolve CDR false lock
US10949586B1 Post-synthesis insertion of debug cores
WO2021055038A1 Redundancy scheme for multi-chip stacked devices
WO2021015867A1 Circuits for and methods of calibrating a circuit in an integrated circuit device
US10868663B1 Flexible wide-range and high bandwidth auxiliary clock and data recovery (CDR) circuit for transceivers
US10951249B1 System and method for time-interpolated power change in a digital pre-distortion circuit
US10943043B1 Multiple output constrained input lookup table generation
US10763870B1 Digital fractional clock synthesizer with period modulation
US10886921B1 Multi-chip stacked devices
US10990736B1 Implementing a circuit design with re-convergence
US10924096B1 Circuit and method for dynamic clock skew compensation
US10978167B1 Efuse bank and associated anchor bits
WO2020185352A1 Locking execution of cores to licensed programmable devices in a data center
US10977404B1 Dynamic scan chain and method
US10848171B1 Hybrid multiplying capacitive digital-to-analog converter (MC-DAC) based loop regulation
US10990555B1 Programmable pipeline at interface of hardened blocks
US10943042B1 Data flow graph optimization techniques for RTL loops with conditional-exit statements