US2014189231A1
|
|
Audio digital signal processor
|
JP2009015867A
|
|
Automated processor generation system and method for designing configurable processor
|
US7937559B1
|
|
System and method for generating a configurable processor supporting a user-defined plurality of instruction sizes
|
US7590964B1
|
|
Method and system for automatic generation of processor datapaths using instruction set architecture implementing means
|
US7664928B1
|
|
Method and apparatus for providing user-defined interfaces for a configurable processor
|
US7774748B1
|
|
System and method for automatic conversion of a partially-explicit instruction set to an explicit instruction set
|
US7334201B1
|
|
Method and apparatus to measure hardware cost of adding complex instruction extensions to a processor
|
US7080283B1
|
|
Simultaneous real-time trace and debug for multiple processing core systems on a chip
|
US6854046B1
|
|
Configurable memory management unit
|
US6732238B1
|
|
Set-associative cache memory having variable time decay rewriting algorithm
|
US7346881B2
|
|
Method and apparatus for adding advanced instructions in an extensible processor architecture
|
US7376812B1
|
|
Vector co-processor for configurable and extensible processor architecture
|
US7227842B1
|
|
Fast IP packet classification with configurable processor
|
US7200735B2
|
|
High-performance hybrid processor with configurable execution units
|
US7274697B2
|
|
Fast IP route lookup with 16/K and 16/Kc compressed data structures
|
US6941548B2
|
|
Automatic instruction set architecture generation
|
US6888838B1
|
|
Fast IP route lookup with configurable processor and compressed routing table
|
US6986127B1
|
|
Debugging apparatus and method for systems of configurable processors
|
US7036106B1
|
|
Automated processor generation system for designing a configurable processor and method for the same
|
US6763327B1
|
|
Abstraction of configurable processor functionality for operating systems portability
|