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TABULA INC

Overview
  • Total Patents
    143
  • GoodIP Patent Rank
    148,707
About

TABULA INC has a total of 143 patent applications. Its first patent ever was published in 2004. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and EPO (European Patent Office). Its main competitors in its focus markets basic communication technologies, computer technology and semiconductors are SCHMIT HERMAN, TIER LOGIC INC and QUICKLOGIC CORP.

Patent filings in countries

World map showing TABULA INCs patent filings in countries

Patent filings per year

Chart showing TABULA INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Teig Steven 96
#2 Redgrave Jason 75
#3 Schmit Herman 67
#4 Hutchings Brad 36
#5 Caldwell Andrew 22
#6 Rohe Andre 14
#7 Voogel Martin 14
#8 Huang Randy Renfu 11
#9 Khubchandani Teju 10
#10 Hutchings Brad L 9

Latest patents

Publication Filing date Title
US2015040094A1 Sequential delay analysis by placement engines
US2014372961A1 System and method for using fabric-graph flow to determine resource costs
US2014109028A1 Transport network
US9000801B1 Implementation of related clocks
WO2014007845A1 Configurable storage elements
US8984464B1 Detailed placement with search and repair
WO2013071183A1 Content addressable memory in integrated circuit
EP2553815A1 System and method for reducing reconfiguration power usage
WO2011035076A1 Micro-granular delay testing of configurable ics
WO2009151934A1 Decision modules
WO2010053590A1 Method and apparatus for saving power in an integrated circuit
WO2010016857A1 Trigger circuits and event counters for an ic
WO2009039462A1 Method and system for reporting on a primary circuit structure of an integrated circuit (ic) using a secondary circuit structure of the ic
US2009146689A1 Configuration context switcher with a clocked storage element
US7969184B1 Configurable high speed high voltage input/output circuit for an IC
US2008129336A1 Via programmable gate array with offset direct connections
US2008059937A1 Method and apparatus for identifying connections between configurable nodes in a configurable integrated circuit
US2009002021A1 Restructuring data from a trace buffer of a configurable IC
US2009002045A1 Integrated circuit with delay selecting input selection circuitry
US2009002016A1 Retrieving data from a configurable IC