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Logic array having high frequency internal clocking
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Structure for providing electrostatic discharge protection
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Resettable latch circuit
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Circuit for generating reference voltage and reference current
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Semiconductor fuse programmable array structure
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High output drive FET buffer for providing high initial current to a subsequent stage
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Circuit for generating reference voltage and reference current
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Clock signal distribution device
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Logic circuit connecting input and output signal lines
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Capacitor coupled push pull logic circuit
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Semiconductor circuit device parameter optimization
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FET constant reference voltage generator
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