SEMICONDUCTOR PROCESS LAB CO has a total of 61 patent applications. Its first patent ever was published in 1990. It filed its patents most often in EPO (European Patent Office), United States and Taiwan. Its main competitors in its focus markets semiconductors, surface technology and coating and machines are KUZNETSOV OLEG A, OTSUKA MANABU and OLEDON CO LTD.
# | Country | Total Patents | |
---|---|---|---|
#1 | EPO (European Patent Office) | 20 | |
#2 | United States | 20 | |
#3 | Taiwan | 6 | |
#4 | WIPO (World Intellectual Property Organization) | 6 | |
#5 | Japan | 5 | |
#6 | Republic of Korea | 3 | |
#7 | China | 1 |
# | Industry | |
---|---|---|
#1 | Semiconductors | |
#2 | Surface technology and coating | |
#3 | Machines | |
#4 | Basic materials chemistry | |
#5 | Materials and metallurgy |
# | Technology | |
---|---|---|
#1 | Semiconductor devices | |
#2 | Coating metallic material | |
#3 | Unspecified technologies | |
#4 | Coating compositions | |
#5 | Unspecified technologies | |
#6 | Treatment of glass | |
#7 | Single-crystal-growth | |
#8 | Metal enamelling |
# | Name | Total Patents |
---|---|---|
#1 | Maeda Kazuo | 44 |
#2 | Shioya Yoshimi | 14 |
#3 | Tokumasu Noboru | 12 |
#4 | Nishimoto Yuhko | 12 |
#5 | Ohira Kouichi | 9 |
#6 | Hirose Mitsuo | 8 |
#7 | Nishimoto Yuko | 7 |
#8 | Shiotani Yoshimi | 5 |
#9 | Shimoda Haruo | 4 |
#10 | Matsui Bunya | 3 |
Publication | Filing date | Title |
---|---|---|
JP2006339506A | Film forming method and semiconductor device manufacturing method | |
JP2006004996A | Interlayer insulating film, diffusion preventing film and source material thereof, film forming method and plasma cvd device for forming film | |
JP2005033189A | Depositing method, manufacturing method of semiconductor device, and semiconductor device | |
JP2005294333A | Film depositing method and semiconductor device | |
JP2004200626A | Semiconductor device and its manufacturing method | |
EP0572704A1 | Method for manufacturing a semiconductor device including method of reforming an insulating film formed by low temperature CVD | |
EP0470632A2 | Method of manufacturing a silicon oxide film and an oxide based glass for semiconductor devices |