Method and apparatus for using synthetic preamable signals to awaken repeater
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Bidirectional channels using common pins for transmit and receive paths
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Apparatus and method for detecting and correcting reverse polarity, in a packet-based data communications system
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State machine for selectively performing an operation on a single or a plurality of registers depending upon the register address specified in a packet
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Apparatus and method for providing multiple channel clock-data alignment
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Integrated circuit I/O node useable for configuration input at reset and normal output at other times
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Crystal oscillator circuits
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Apparatus and method for full-duplex ethernet communications
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Apparatus for page mode programming of an EEPROM cell array with false loading protection
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Current-regulated,voltage-regulated erase circuit for eeprom-memory cells
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Fault tolerant differential memory cell and sensing
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Three transistor high endurance eeprom cell
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MOS floating gate memory cell containing tunneling diffusion region in contact with drain and extending under edges of field oxide
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MOS floating gate memory cell and process for fabricating same
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Block electrically erasable EEPROM
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Apparatus for page mode programming of an EEPROM cell array with false loading protection
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Charge pump for providing programming voltage to the word lines in a semiconductor memory array
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Mos floating gate memory cell and process for fabricating same.
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Redundancy circuit for use in a semiconductor memory array
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Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array
