|
US2021043264A1
|
|
Methods and systems of cell-array programming for neural compute using flash arrays
|
|
US2020160165A1
|
|
Methods and systems of operating a neural circuit in a non-volatile memory based neural-array
|
|
US2013010542A1
|
|
Programming methods and memories
|
|
US2012163076A1
|
|
Single check memory devices and methods
|
|
US2010208524A1
|
|
Soft landing for desired program threshold voltage
|
|
US2010124108A1
|
|
Two-part programming methods and memories
|
|
US2010124133A1
|
|
Replacing defective memory blocks in response to external addresses
|
|
US2010124126A1
|
|
Erase voltage reduction in a non-volatile memory device
|
|
US2010124127A1
|
|
Systems and methods for erasing a memory
|
|
US2010115176A1
|
|
Programming memory cells with additional data for increased threshold voltage resolution
|
|
US2009106482A1
|
|
Memory device program window adjustment
|
|
US2009067251A1
|
|
Reducing noise in semiconductor devices
|
