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PROMOS TECHNOLOGIES PTE LTD

Overview
  • Total Patents
    79
About

PROMOS TECHNOLOGIES PTE LTD has a total of 79 patent applications. Its first patent ever was published in 2004. It filed its patents most often in United States, Taiwan and China. Its main competitors in its focus markets semiconductors, computer technology and basic communication technologies are CHINGIS TECHNOLOGY CORP, NVX CORP and KILOPASS TECHNOLOGY INC.

Patent filings in countries

World map showing PROMOS TECHNOLOGIES PTE LTDs patent filings in countries
# Country Total Patents
#1 United States 38
#2 Taiwan 28
#3 China 8
#4 Japan 3
#5 Germany 2

Patent filings per year

Chart showing PROMOS TECHNOLOGIES PTE LTDs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Dong Zhong 11
#2 Faue Jon Allan 10
#3 Ding Yi 9
#4 Butler Douglas B 7
#5 Butler Douglas Blaine 6
#6 Haselden Barbara 6
#7 Chen Ching-Hwa 6
#8 Heightley John D 5
#9 Zhang Xinyu 5
#10 Eaton Steve S 4

Latest patents

Publication Filing date Title
US2010123494A1 Configurable architecture hybrid analog/digital delay locked loop (DLL) and technique with fast open loop digital locking for integrated circuit devices
US2010060315A1 High capacitive load and noise tolerant system and method for controlling the drive strength of output drivers in integrated circuit devices
US2010047994A1 Fabrication of integrated circuits with isolation trenches
TW200915544A NAND-type flash array with reduced inter-cell coupling resistance
TW200917468A Non-volatile memory devices with charge storage regions
US2008265305A1 Integrated circuits with substrate protrusions, including (but not limited to) floating gate memories
US2008318428A1 Method for Achieving Uniform Chemical Mechanical Polishing In Integrated Circuit Manufacturing
US2009303787A1 Nonvolatile memories with tunnel dielectric with chlorine
TW200915409A Two step chemical mechanical polish
US2009294806A1 Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer
US2009297956A1 Photolithography with optical masks having more transparent features surrounded by less transparent features
US7583142B1 Low skew differential amplifier using tail voltage reference and tail feedback
US2009231944A1 Multi-bank block architecture for integrated circuit memory devices having non-shared sense amplifier bands between banks
US2009231945A1 Asymetric data path position and delays technique enabling high speed access in integrated circuit memory devices
US2009225613A1 Twin cell architecture for integrated circuit dynamic random access memory (DRAM) devices and those devices incorporating embedded DRAM
US2009190410A1 Using differential data strobes in non-differential mode to enhance data capture window
US2009159957A1 Nonvolatile memories with laterally recessed charge-trapping dielectric
US2009154286A1 N-bit shift register controller
US2009130570A1 Methods for inspecting and optionally reworking summed photolithography patterns resulting from plurally-overlaid patterning steps during mass production of semiconductor devices
US2009096009A1 Nonvolatile memories which combine a dielectric, charge-trapping layer with a floating gate