US2016147660A1
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Access extent monitoring for data transfer reduction
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Watchdog method and device
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Data processing system with debug control
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Configurable per-task state counters for processing cores in multi-tasking processing systems
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Method to communicate task context information and device therefor
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Method and device for generating floating-point values
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Data processor device having a debug control module which selectively modifies trace messages
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Method and device for handling data values
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Method and device for generating an exception
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Random access of a cache portion using an access module
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Flexible control mechanism for store gathering in a write buffer
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US2014143471A1
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Flexible control mechanism for store gathering in a write buffer
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Random timeslot controller for enabling built-in self test module
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Codeword error injection via checkbit modification
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Stack-based trace message generation for debug and device thereof
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Multiple core data processor with usage monitoring
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Memory protection unit (MPU) having a shared portion and method of operation
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Multi-processor data processing system having synchronized exit from debug mode and method therefor
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Memory management unit (MMU) having region descriptor globalization controls and method of operation
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Method and device for controlling debug event resources
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