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MICROSEMI SEMICONDUCTOR ULC

Overview
  • Total Patents
    64
  • GoodIP Patent Rank
    26,809
  • Filing trend
    ⇧ 40.0%
About

MICROSEMI SEMICONDUCTOR ULC has a total of 64 patent applications. It increased the IP activity by 40.0%. Its first patent ever was published in 2008. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and China. Its main competitors in its focus markets basic communication technologies, digital networks and computer technology are NEWCOSEMI BEIJING TECH CO LTD, WANG PING-YING and LAMANNA PASQUALE.

Patent filings in countries

World map showing MICROSEMI SEMICONDUCTOR ULCs patent filings in countries

Patent filings per year

Chart showing MICROSEMI SEMICONDUCTOR ULCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Jin Qu Gary 17
#2 Mitric Krste 13
#3 Milijevic Slobodan 13
#4 Rahbar Kamran 11
#5 Schram Paul H L M 9
#6 Warriner Mark A 6
#7 Zargar Tanmay 6
#8 Aliahmad Mehran 5
#9 Situ Guohui 5
#10 Colby David 5

Latest patents

Publication Filing date Title
US10992301B1 Circuit and method for generating temperature-stable clocks using ordinary oscillators
US10917097B1 Circuits and methods for transferring two differentially encoded client clock domains over a third carrier clock domain between integrated circuits
US10715307B1 Embedded time of day receiver for clock transmission
US2020288573A1 Techniques for routing electrical signals through electrical components and related methods
US10325613B1 Acoustic delay estimation
US2019123723A1 Digital phase locked loop clock synthesizer with image cancellation
US10404447B1 Clock recovery device with state machine controller
US10148274B1 Non-linear oven-controlled crystal oscillator compensation circuit
US2018329450A1 Clock synthesizer with hitless reference switching and frequency stabilization
US2018205370A1 Clock synthesizer with integral non-linear interpolation (INL) distortion compensation
US2018088535A1 Time-to-digital converter with phase-scaled course-fine resolution
US2018091291A1 Clock recovery device with switchable transient non-linear phase adjuster
US2018048312A1 Multi-format driver interface
US2017346494A1 Method of speeding up output alignment in a digital phase locked loop
WO2017054073A1 Noise reduction in non-linear signal processing
US2016301419A1 Apparatus for generating clock signals having a PLL part and synthesizer part with programmable output dividers
US2016299870A1 PLL system with master and slave devices
US2016301417A1 Phase locked loop with accurate alignment among output clocks
WO2016154761A1 Universal input buffer
WO2016161504A1 Digital phase locked loop arrangement with master clock redundancy