| # | Country | Total Patents | |
|---|---|---|---|
| #1 | Republic of Korea | 7 | |
| #2 | Australia | 2 | |
| #3 | WIPO (World Intellectual Property Organization) | 2 |
| # | Industry | |
|---|---|---|
| #1 | Basic communication technologies | |
| #2 | Digital networks | |
| #3 | Electrical machinery and energy | |
| #4 | Mechanical elements |
| # | Technology | |
|---|---|---|
| #1 | Automatic control of oscillations | |
| #2 | Pulse technique | |
| #3 | Digital information transmission | |
| #4 | Resonators | |
| #5 | Tuning resonant circuits | |
| #6 | Dynamo-electric machines | |
| #7 | Gearing |
| # | Name | Total Patents |
|---|---|---|
| #1 | Byun Sang Jin | 11 |
| #2 | Yang Jeong Sik | 7 |
| #3 | Kim Jin Wook | 4 |
| #4 | Min Byung Jun | 4 |
| #5 | Kim Hyun Jin | 4 |
| #6 | Min Byeong Jun | 3 |
| #7 | Kim Jin Uk | 3 |
| #8 | Jun Hyeon Deok | 3 |
| #9 | Park Chan Hong | 3 |
| #10 | Kim Beom Seop | 3 |
| Publication | Filing date | Title |
|---|---|---|
| KR20050003551A | Digital filter tuning circuit having analog compensation function | |
| KR20040103042A | Clock recovery circuit using up/down signal generator of being insensible to delay in a loop | |
| KR20040044219A | High Resolution Multi-Phase Clock Generator Based On Array Of Delay Locked Loops | |
| KR20040023075A | High-speed adaptive Equalizer | |
| KR20030028312A | Charge Pump Circuit for PLL | |
| KR20030028313A | FSK Demodulator using DLL and a demodulating method | |
| KR20030027507A | DLL with False Lock Protector |